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Yield and Integration Engineer
Company | Teledyne |
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Location | Goleta, CA, USA |
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Salary | $90800 – $121100 |
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Type | Full-Time |
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Degrees | Bachelor’s, Master’s |
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Experience Level | Mid Level |
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Requirements
- BS in engineering or a science, M.S. preferred
- 2+ years as a Process, Design, Quality or Manufacturing Engineer
- Ability to work in cleanroom environment.
Responsibilities
- Collects, tracks and analyzes process and metrology data from a variety of sources to inform and guide team’s design and process yield improvement activities
- Direct involvement in device failure analysis
- Collaborate with team members and other contributors across the spectrum of relevant disciplines and levels of authority
Preferred Qualifications
- Semiconductor wafer processing
- Programming skills in: Python, Matlab, R, JMP, or similar
- SQL database query experience
- Statistical Process Control (SPC)
- Structured problem-solving methods (Kepner Tregoe, DMAIC, 8D, 6-sigma, etc.)
- Design of Experiments (DOE/ANOVA)
- Optical microscopy
- SEM/FIB
- Profilometry, ellipsometry, X-Section, wafer stress
- Other elemental analysis methods (TOF-SIMS, EDX, & Auger)
- Other fault isolation techniques (FIBedit, OBIRCH/TIVA, IR, & curve trace)
- Wafer processing (photo, etch, dep, clean, CMP, inspection, etc.)
- Vacuum technology and equipment
- Infrared Imaging
- Hermetic packaging (solder, seam seal, wirebond, WLP, die attach, leak testing, etc.)