Skip to contentTech Lead Firmware Engineer – DDR technologies
| Company | Astera Labs |
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| Location | Santa Clara, CA, USA |
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| Salary | $140000 – $200000 |
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| Type | Full-Time |
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| Degrees | Bachelor’s |
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| Experience Level | Senior |
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Requirements
- Bachelor’s in Electrical engineering / Electronics / Computer Science or related fields.
- 5+ years of experience in developing Firmware using C in Embedded environments.
- Good knowledge in DDR Technology internals (DDR Training, DDR RAS, PMIC, RCD etc.)
- Ability to debug DDR related issues.
Responsibilities
No responsibilities provided.
Preferred Qualifications
- Post-Silicon bring up and validation of DDR memory interfaces
- Experience working with cross-functional teams and partners.
- Pre-Silicon DDR bring up experience is a plus
- Experience with RDIMMs, DDR controller/PHY tuning is a plus
- Knowledge of Server memory performance and stability tuning for latency and bandwidth is a plus
