Software Architect – FPGA Emulation/Prototyping Domain
| Company | Cadence Design Systems |
|---|---|
| Location | San Jose, CA, USA |
| Salary | $169400 – $314600 |
| Type | Full-Time |
| Degrees | Bachelor’s, Master’s, PhD |
| Experience Level | Expert or higher |
Requirements
- Bachelor’s in computer science, Electrical /Computer Engineering and a minimum of 12 years of related experience, or Masters and a minimum of 10 years of related experience, or PhD + 8 years of relevant experience
- Should be Emulation/Prototyping guru
- Experience working on delivery of EDA applications (synthesis/place/route/timing/optimizations)
- Expert in Timing & Clocking of Emulation & Prototyping System
- Excellent programming skills in C/C++, Object Oriented Programming, Multi-threaded programming
- Knowledge Verilog or SystemVerilog and good understand digital circuits.
Responsibilities
- Re-architecting protium compiler for very high-performance system
- Work includes writing efficient C++ code using optimized data structures
- Improving runtime by multi-threading & improving memory footprint by using efficient data structures & algorithm
- Reading using timing annotations & incorporating in the Protium Compiler
- Write Design Spec & Unit Tests
Preferred Qualifications
- Custom Prototyping experience is a plus