SoC Architect – Coherent Interconnect

SoC Architect – Coherent Interconnect

Requirements

• 15+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 13+ years of experience with a Master’s degree, or 11+ years of experience with a PhD.
• 15+ years of experience in SoC architecture, interconnect design, or related fields, with a focus on coherent interconnect architectures.
• In-depth knowledge of cache coherence protocols (e.g., MESI, MOESI, etc.), network-on-chip (NoC) designs and protocols (e.g., AXI, ACE, CHI etc.), high-speed interface protocols (e.g., PCIe, USB, etc.), interconnect IP design and development, and system-level design and optimization.
• Proficiency in programming languages such as C, C++, Python, and Verilog/VHDL.
• Proven experience in technical leadership, collaboration, and communication with cross-functional teams.
• Strong understanding of industry trends and standards in SoC architecture, interconnect design, and related technologies.

Responsibilities

• Provide technical leadership and expertise in the design and development of coherent interconnect architectures, including cache coherence protocols, network-on-chip (NoC) designs, and high-speed interface protocols (e.g., AXI, ACE, CHI etc.).
• Collaborate with cross-functional teams to define and optimize SoC architectures, ensuring that interconnect designs meet system performance, power, and area requirements.
• Lead the development of interconnect IP blocks, including specification, design, verification, and validation of coherent interconnect protocols and NoC fabrics.
• Analyze and optimize interconnect performance, power consumption, and area efficiency using simulation tools, modeling, and benchmarking.
• Work closely with various stakeholders, including system architects, IP designers, and software teams to ensure seamless integration of interconnect IP into SoC designs.
• Contribute to the development of technical roadmaps for coherent interconnect architectures, aligned with Samsung’s strategic goals and industry trends.
• Mentor junior engineers and share knowledge and expertise with the team to ensure skill growth and expertise development.

Preferred Qualifications

No preferred qualifications provided.