SLD FPGA Verification Engineer III – Lunar Permanence
| Company | Blue Origin |
|---|---|
| Location | Seattle, WA, USA, Denver, CO, USA |
| Salary | $116323 – $177656 |
| Type | Full-Time |
| Degrees | Bachelor’s, Master’s |
| Experience Level | Senior |
Requirements
- BS/MS in Electrical Engineering, Computer Engineering or a closely related field of study
- 5+ years experience verifying FPGAs or ASICSs
- In-depth experience using RTL simulation tools such as Siemens QuestaSim, ModelSim, or equivalent
- In-depth knowledge of System Verilog and the Universal Verification Methodology (UVM)
- Expertise in developing testbench environment and verification components (Monitor, Scoreboard, Driver, Agent etc.) from scratch
- Understands different types of coverage, usage of cover classes, cover points, etc.
- Experience with predictive testbench components, functional coverage and assertions
- Experience with constrained random verification
- Experience with the Register Abstraction Layer
- Develop detailed test plans and write tests, run regressions, collect coverage matrices and report progress to the program
- Reviewing verification and validation results against the coverage goals
- Writing, analyzing and achieving coverage metrics
- Experience of debugging skills to narrow down and isolate issue between RTL design and testbench or test case is required
- Ability to earn trust, maintain positive and professional relationships, and contribute to a culture of inclusion
- Must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum
Responsibilities
- Perform requirements-based verification of FPGAs using Universal Verification Methodology (UVM)
- Create comprehensive verification and validation plan that encompasses functional and system level verification and validation
- Develop IP/subsystem/system level testbench and tests to achieve required coverage goals
- Document plans and procedures
- Write directed and random test cases
- Generate reports in support of certification of the design to a high DAL
Preferred Qualifications
- Familiarity with AXI protocols, PCIe, Ethernet, SPI, I2C interfaces
- Debugging FPGA/ASIC hardware and assisting with HW/SW integration
- Managing regression and continuous integration infrastructure within GITLab
- Knowledge of scripting languages such as Python, Perl, or TCL/Shell for automation
- Working knowledge of NPR 7150.2, DO-254, or other safety-critical software standard