Senior Principal Digital Engineer – FPGA and ASIC Design
| Company | Northrop Grumman |
|---|---|
| Location | Baltimore, MD, USA |
| Salary | $144200 – $216400 |
| Type | Full-Time |
| Degrees | Bachelor’s, Master’s, PhD |
| Experience Level | Senior, Expert or higher |
Requirements
- Bachelor’s degree with 8 years of experience, a Master’s degree with 6 years of experience or a PhD with 4 years of experience in Electrical Engineering, Computer Engineering, Computer Science, or related technical fields; an additional 4 years of experience may be considered in lieu of a degree
- U.S Citizenship is required
- An active DoD Secret Security Clearance is required with the ability to obtain Special Program Access (SAP)
- Experience with industry standard FPGA design implementation tools for IP integration, PnR, CDC such as Xilinx Vivado, Intel Quartus, and QuestaSim
- Working knowledge of full product life cycle (requirements, design, implementation and test) of FPGA Design and/or ASIC Design
- Knowledge of System Verilog, Verilog and/or VHDL
Responsibilities
- Work closely with design engineers and will utilize your knowledge of modern design methods, tools and techniques
- Development of testbench, tests, verification IP (VIP), verification models, coverage models, extensive simulation and debug, code coverage and functional coverage, generation and analysis of reports and metrics, documentation etc.
- Ability to operate in a team environment and collaborate across the different teams as required to accomplish the goals.
Preferred Qualifications
- Advanced Degrees in Electrical Engineering, Computer Engineering, Computer Science, or related technical fields
- Active DoD Top Secret Clearance or higher
- Experience with industry standard ASIC front-end design tools for synthesis, LEC, CDC
- Experience with STA constraints generation and timing closure
- Experience with MATLAB, Mentor Graphics design tools, Synopsys or similar tool
- Familiarity with Xilinx and Intel FPGA technology