Senior HSIO Validation Engineer

BS or MS in Electrical or Computer Engineering (or equivalent experience) and a minimum of 8 years of relevant experience
In depth understanding of PCIe (or similar) protocol and characterization/validation methods in post-silicon environment
Excellent knowledge of Signal integrity concepts, Silicon characteristics and high speed/SERDES functional validation
Good knowledge of lab equipment (DSOs, BERT, Protocol/Logic analyzers)
Understanding of firmware/driver structures and their interaction with HW
Strong in scripting languages (Perl, Python) to write direct test/debug programs for stress and failure analysis
Strong project management, collaboration, and communication skills

Drive the planning and execution of NVLINK/C2C or similar interfaces in the areas of functional bring-up, system-level validation, productization and troubleshooting for NVIDIA GPUs and SOCs
Drive schedule, programming guides, customer critical issues, manufacturing yield improvements, and design feedback
Investigate technically complicated HSIO bugs and help drive debug efforts across various teams
Coordinate with logic design, circuit design, board design, Simulation, diagnostics, ATE, firmware, driver, and marketing teams to drive the chip into production
Develop new methodologies to improve the silicon validation process, which will help meet upcoming performance, adaptability, and safety industry standards
Ensure interoperability with connected devices and system components in sophisticated interconnect topologies
Engage proactively with multi-functional engineering teams, including system architects, mixed-signal design, DGX, software/firmware, hardware/software quality assurance, operations, and application engineering to facilitate the design, development, troubleshooting, and release of upcoming products

No preferred qualifications provided.