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Senior Engineer – Analog Layout
| Company | Marvell |
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| Location | Santa Clara, CA, USA |
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| Salary | $84910 – $127200 |
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| Type | Full-Time |
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| Degrees | Bachelor’s, Master’s |
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| Experience Level | Senior |
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Requirements
- Have fundamental understanding of electrical concepts, likely acquired through a degree in Electrical Engineering (graduate or undergraduate).
- Have some specialized course work in analog design or layout, either as part of your Electrical Engineering degree, summer courses, or conference courses.
- Know how to use CAD tools to do the implementation layers, microelectronic layers in design that go beyond the schematics.
- Have excellent communication skills to give status updates to your team, present to global teams in different time zones, and to share information with many different levels of personnel at Marvell. Fluency in English is required.
Responsibilities
- Receive a schematic from an Analog IC Designer and use a CAD tool to graphically design the layers of that schematic.
- Run simulations and verifications on the design using Cadence Virtuoso, refine and debug as needed in concert with the designer.
- Iterate the design until it meets the desired specifications.
- Meet regularly with the designer to share information and work together.
- Participate in routine meetings with the technical mentor, layout team, and project team to update them about progress and present issues or solutions.
Preferred Qualifications
No preferred qualifications provided.
