Senior CAD Engineer
| Company | Celestial AI |
|---|---|
| Location | Toronto, ON, Canada, Santa Clara, CA, USA |
| Salary | $175000 – $215000 |
| Type | Full-Time |
| Degrees | Bachelor’s, Master’s |
| Experience Level | Expert or higher |
Requirements
- BS/MS in Electrical Engineering or Computer Science
- 10+ years of CAD/EDA design-automation experience supporting analog/AMS and preferably ASIC/DV teams
- Hands-on expertise with Cadence Virtuoso (schematic & layout), ADE Assembler/Explorer, Spectre
- Signoff experience with Pegasus, Quantus, and VoltusFI or equivalent Calibre toolsets
- Strong SKILL scripting and Python development skills for flow automation
- FlexLM license server installation, configuration, and troubleshooting
- IP Version control. Git, IC Manage (gdpxl) or equivalent
- PDK integration for TSMC FinFET nodes down to N5
Responsibilities
- Develop and maintain CAD environments for Analog/AMS, ASIC, Photonics and Systems teams, ensuring seamless integration across the organization.
- Define, implement, and automate design and signoff flows for custom and digital.
- Install, configure, and optimize EDA tools (Cadence/Synopsys/Siemens) and FlexLM licenses.
- Integrate and validate PDKs, tech files and IP libraries, collaborating with foundry and third-party vendors.
- Manage SLURM cluster infrastructure, job scheduling, and resource allocation to maximize ROI.
- Write automation scripts (Python, TCL, SKILL, Bash) to accelerate CAD flows and reduce manual overhead.
- Maintain design repositories (IC Manage gdpxl for analog, Git for ASIC) and enforce version control best practices.
- Debug SPICE, DRC/LVS, PEX, and EMIR issues, working with designers to improve performance and reliability.
- Monitor license/cluster usage, analyze trends, and recommend cost-effective scaling strategies.
- Liaise with EDA vendors to resolve issues, drive tool improvements, and evaluate emerging solutions.
Preferred Qualifications
- Experience with Virtuoso AMS Designer and Cadence Xcelium for behavioral modeling
- Experience with SLURM cluster manager
- Digital RTL-to-GDSII flows (synthesis, PnR, STA, PV)
- Exposure to CI/CD pipelines for CAD-flow release and regression automation
- Strong written and verbal communication skills; proven mentorship of junior engineers