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Senior ASIC Verification Engineer
| Company | Ciena |
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| Location | Ottawa, ON, Canada |
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| Salary | $100900 – $161100 |
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| Type | Full-Time |
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| Degrees | Bachelor’s, Master’s |
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| Experience Level | Senior |
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Requirements
- Electrical or computer engineering, computer science or other applicable scientific degree at the BEng/BSc or MEng/MSc level
- A highly motivated self-starter, able to work independently, while being a great teammate
- Ability to methodically tackle sophisticated technical problems
- Excellent organization, written and oral (English) interpersonal skills
- Familiarity with formal verification methods
- Familiarity with standards and protocols such as OTN, B100G, Ethernet
- Familiarity with programming languages such as: Python, Make, bash, object-oriented programming, C, C++, System C
Responsibilities
- Propose and implement innovative verification strategies to thoroughly simulate and validate functional blocks and subsystems for the Wavelogic family of products
- Read and understand the architecture and functional requirements specification document(s) and communicate and collaborate with systems engineers and architects
- Be responsible for the complete and thorough validation of one or more architectural functional blocks by using an appropriate combination of simulation, formal and coverage methods
- Build the verification, functional coverage and formal verification test plans
- Create testbench environment and/or components, agents, scoreboard, and all test scenarios related to your architectural functional block using System Verilog UVM and/or C where applicable
- Perform coverage driven verification, formal verification, monitor regressions and debug resulting failures with the help of the function’s designer
- Report status updates on a regular basis
Preferred Qualifications
No preferred qualifications provided.
