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Principal Application Engineer
| Company | Cadence Design Systems |
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| Location | San Jose, CA, USA |
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| Salary | $123200 – $228800 |
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| Type | Full-Time |
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| Degrees | Bachelor’s |
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| Experience Level | Expert or higher |
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Requirements
- Minimum 10+ years of industry hands on experience
- BS degree (or higher) in Computer/Electrical Engineering
- Strong knowledge of Digital Design Fundamentals and Static Timing Analysis
- Prior experience with IC digital implementation flows – Synthesis, Place and Route, IR Drop, Timing Signoff
- Prior experience with Cadence tools (Genus, Innovus, Conformal, Tempus, Modus, Voltus) or ICC, ICC2, DC, FC , Primetime
- Experience with advanced nodes 5nm and below
- Expertise in scripting languages as Tcl/Perl/Python/shell is a must
- Strong customer-facing communication and problem-solving skills
- Strong verbal, written, and customer communication skills
Responsibilities
- Explore and Deploy Latest PPA methodologies/flows on Next generation Customer Designs
- Drive technical evaluations/benchmarks to success
- Provide technical support to Cadence customers in the areas of Backend Digital Design Implementation and Signoff
- Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules
- Work closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements
- Drive adoption and proliferation of Cadence tools and technologies
- Efficiently translate customer requirements into tool solutions by working closely with R&D
Preferred Qualifications
No preferred qualifications provided.
