Power and Performance Modeling Architect – Reality Labs
| Company | Meta |
|---|---|
| Location | Austin, TX, USA, Redmond, WA, USA, Sunnyvale, CA, USA, San Diego, CA, USA |
| Salary | $142000 – $203000 |
| Type | Full-Time |
| Degrees | Bachelor’s |
| Experience Level | Senior, Expert or higher |
Requirements
- Bachelor’s degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
- 4+ years of experience with programming (C/C++ or SystemC-TLM) and scripting (Python).
- 2+ years of experience with power concepts and low power design principles.
- 2+ years of experience evaluating architectural trade-offs in performance, power, and other KPIs.
- 4+ years of experience with SoC Architecture, NoCs, memory subsystems, and heterogeneous compute principles.
Responsibilities
- Identify opportunities for optimization and collaborate with hardware teams to solidify HW-SW co-design.
- Lead IP performance bottleneck analysis using traffic traces from pre/post silicon platforms.
- Lead thermal measurement, performance bottleneck analysis, and power characterization.
- Lead Subsystem NoC characterization, architecture, and design.
- Lead analysis and configuration of subsystem caches for optimal performance.
- Drive workload analysis for power and performance across the workloads of interest.
- Drive IP latency hiding features and QoS recommendations for each compute engine.
- Collaborate with diverse partners to deliver documentation and proof of concepts for workloads running on these subsystems.
- Identify and manage appropriate comparative analysis to ensure the workloads are targeting state of the art.
Preferred Qualifications
- 3+ years of experience with thermally constrained power/performance optimization on embedded devices.
- 3+ years of experience with bare-metal programming, micro-benchmarking, etc.
- 3+ years of experience deconstructing a problem, designing performance experiments, analyzing and visualizing data, and drawing conclusions for modeling and subsystem architecture.
- Expertise with power management principles, thermal and di/dt analysis, multi-voltage designs, as well as DVFS and UPF concepts.
- Expertise collaborating and communicating effectively in a matrix environment, as well as acting independently as the point-of-contact representing your team with internal and external partners.
- Expertise in at least one relevant area: Audio, Display, Rendering, Computer Vision, or Imaging.
- Expertise with developing and utilizing telemetry solutions to analyze and profile workloads.
- Expertise with developing and/or using HW/SW emulation systems.