Memory Tuning and Qualification – Discrete Graphics

Memory Tuning and Qualification – Discrete Graphics

Requirements

• Bachelor’s degree in Electrical or Computing engineer or related field
• 3+ years Debug skills to root cause post-production issues and/or customer returns
• 3+ years experience in validation, or verification and/or debug of memory sub-system
• 3+ years Ability to apply knowledge of other high-speed, high-performance memory technologies

Responsibilities

• Planning, execution, and debug for pre- and post-silicon validation
• Develop and execute test plans for functional and electrical validation (PVT shmoo characterization)
• Develop functional, electrical validation plans for memory features, align cross-functional teams on the support and validation plans
• Drive debug in post silicon, root-cause problems and steer the team to the best corrective action to move forward
• Collaborate and drive memory related silicon issues across multi-functional teams: Design, Verification, Silicon Validation, Productization, System Hardware and Software

Preferred Qualifications

• 1+ years Experience working with major DRAM memory vendors and validation of DRAM device
• 1+ years Hands-on experience in using industry standard JTAG, I2C, Tester and Lab tools
• 1+ years Programming skills (C/C++, Python) and comfortable working on Linux or Windows platforms
• 1+ years Ability to apply knowledge of other high-speed, high-performance memory technologies