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Hardware Validation / Electrical Design Verification Test Engineer
Company | Arista Networks |
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Location | Santa Clara, CA, USA |
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Salary | $120000 – $145000 |
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Type | Full-Time |
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Degrees | |
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Experience Level | Senior |
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Requirements
- 5+ years of experience in Electrical Design Verification Testing (EDVT)
- Good understanding of fundamentals of electrical engineering, programming, and networking technologies
- Prior experience in modular and rack level system testing is must
- Excellent knowledge of complex system level debugging and root cause analysis
- Experience with IEEE 802.3 C2M spec and test methodology
- Strong understanding of electrical eye diagrams for NRZ and Pam4 signaling
- Hands on capability to design and implement EDVT characterization tests with solid understanding of hardware design and manufacturing test parameters
- Experience in Python, TCL/C/C++/shell scripting with preferred experience in Python
- Excellent verbal and written communication skills
- Able to work well on a team and self-driven to work independently
- Able to handle moving the systems of 20lb to 50lb around the lab and chambers
- Analytic mindset to debug and root cause issues found during testing
Responsibilities
- Perform System level Hardware DVT (EDVT), Power measurements, Component (Memory, PSU, optics) validations
- Develop and execute system and component-level test plans and work closely with HW/SW design team to debug design failures
- Develop and execute Python test scripts to perform EDVT and Failure Analysis
- Support multi-tasking validation projects (4-5 at the same time)
- Closely interface/engage with cross-functional product teams (HW, SW, NPIE, MFG, PM) to address any EDVT dependencies to meet the project milestones
Preferred Qualifications
- Prior experience in system level testing using liquid cooling technology is plus