Hardware Failure Analysis Engineer – RMA Focus
| Company | Palo Alto Networks |
|---|---|
| Location | Santa Clara, CA, USA |
| Salary | $Not Provided – $Not Provided |
| Type | Full-Time |
| Degrees | |
| Experience Level | Mid Level, Senior |
Requirements
- Strong Linux system administration knowledge.
- Strong network protocol knowledge.
- Outstanding communication skills, both written and verbal.
- A highly collaborative working style is a must.
- Moderate to fluent in programming languages and tools used for the test environment (Linux OS, Tcl, Expect, Shell Script, Python, Network Switch, Terminal Server, and PDU).
- Ability to apply a working knowledge of server/client and IP based networking hardware architecture, both system and component level, to the test environment.
- Demonstrated ability at hardware debugging to component level and fault isolation.
- Knowledge of Salesforce, JIRA and SAP desired.
- Ability to read schematics and view board files (Allegro Viewer and Cadence PCB Design).
- Must be local in SF bay area to be onsite.
Responsibilities
- Drive returned product Failure Analysis, characterizing failures, and escalating issues and trends to the Hardware Quality Engineering team.
- Resolve escalated RMA’s by determining the hardware root cause of the failure issue.
- Track and report on RMA failure trends by product and cause to the Tech Op’s team.
- Track the progress of all in-progress RMA’s requiring FA and prioritizing accordingly.
- Monitor process and product corrective actions to ensure changes were in fact effective in improving the product.
- Maintain accurate data entry into SAP and Salesforce database tools.
Preferred Qualifications
- Knowledge of Salesforce, JIRA and SAP desired.
- Involvement and/or membership in relevant industry standards bodies is a plus.