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Engineering Program Manager

Engineering Program Manager

CompanyTeledyne
LocationElgin, IL, USA
Salary$135500 – $180600
TypeFull-Time
DegreesBachelor’s, Master’s
Experience LevelSenior

Requirements

  • BS in Electrical Engineering, Computer Science or Computer Engineering.
  • Minimum 7 years of demonstrated experience in FPGA, ASIC design/ development, and related project management.
  • Experience working both independently and in a team-oriented, collaborative environment.
  • Strong understanding of various interfaces and protocols (depending on program being managed) and usage in industry.
  • Ability to effectively prioritize and execute tasks in a high-pressure environment.
  • Strong interpersonal, organizational and communication skills.
  • Team player, persuasive, encouraging, and motivating.
  • Open minded, quick learner, creative, likes challenges.

Responsibilities

  • Manage various activities associated with developing new products and sustaining existing ones.
  • Manage local and/or overseas engineering teams to maintain project deliveries on time and with high quality.
  • Engineering representative to other departments in the company for the products being managed.
  • Help define product specifications through hardware and software capabilities. Document the design and review with the rest of the team.
  • Help define logic architecture of various blocks of the design using Verilog and verify their block level functionality through simulation.
  • Ensure different disciplines (local and overseas) are synchronized and driving to a common goal.
  • Own NPI cycle for the products being developed and sustained.
  • Manage various activities associated with NPI for new products and sustaining existing ones.
  • Work with Operations and Support teams to maintain project timelines and prompt resolution to customer issues.
  • Work with customer support to reproduce and fix issues found in the field.
  • Reproduce customer environment to reproduce any failures found in the field.
  • Provide timely fixes/updates to the field to maintain customer delight.

Preferred Qualifications

  • MS in Electrical/Computer Engineering.
  • Knowledge of FPGA tools such as Quartus, Vivado, Modelsim, Signal tap, and Chipscope.
  • Ability to write timing constraints and designs that repeatedly achieve timing closure.
  • Experience with Monitoring and/or Test & Measurement tools.
  • Experience with one or more of the following protocols: PCIe, USB, MPhy, C/D-Phy, or any high-speed serial protocol.