Engineer – Multiple Openings

Master’s degree in Industrial Engineering, Manufacturing Engineering, Electrical Engineering, or a related field.
Completion of a graduate-level course, research project, or internship involving semiconductor fabrication processes.
Completion of a graduate-level course, research project, or internship involving semiconductor device physics.
Completion of a graduate-level course, research project, or internship involving structured problem solving techniques: DMAIC, FMEA, Is-Is Not, Fishbone, and 8-D.

Serve as the technology owner for the factory.
Oversee the quality of every wafer that leaves the fab, and balance the business need of the factory with maintaining quality of the material that leaves the factory.
Oversee technology level systematic defect, yield, and process margin improvement projects and TFTs (Task Force Teams).
Design, execute, and analyze experiments.
Participate in, and sometimes lead, Excursion / Issue meetings to provide Technology level risk assessment.
Conduct data analysis to look for commonalities relating product failure to in fab signals.
Communicate technical information to senior leadership in/outside of the department through high quality presentations.
Submit wafers for FA and analyzes the results to formulate failure hypothesis.
Develop Change Point Management Plans and execute to set timelines.
Maintain strong relationship with Korea counterparts and work closely with them to improve yields / execute change points.
Maintain and improve Transistor and Backend (Metallization) electrical parameter performance to prevent scrap/excursions.
Use Structured Problem Solving techniques and proper risk assessment to solve problems / execute high-risk projects.

No preferred qualifications provided.