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Emulation/Post-Si Validation Engineer

Emulation/Post-Si Validation Engineer

CompanyTenstorrent
LocationAustin, TX, USA, Santa Clara, CA, USA
Salary$100000 – $500000
TypeFull-Time
DegreesBachelor’s, Master’s, PhD
Experience LevelMid Level

Requirements

  • BS/MS/PhD in EE/ECE/CE/CS with at least 3 years of industry experience
  • Hardware Verification methodology and techniques such as emulation, assertions simulation, debug, coverage
  • Emulator experience (e.g. Palladium, Veloce, ZeBu, HAPS, custom FPGA emulation solutions)
  • Programming in Verilog, System Verilog
  • Experience with industry standard testbench methodology, assertions, coverage
  • Debug tools or waveform viewers.

Responsibilities

  • Develop emulation infrastructure from scratch, leveraging both commercial and open-source emulation platforms
  • Build and deploy emulation testbench components
  • Create emulation focused test plans and deploy workloads ranging from operating systems to applications for functional and performance testing of the design
  • Improve on emulation performance working with design team as well as vendors
  • Create flows for large scale regressions on emulation platforms

Preferred Qualifications

    No preferred qualifications provided.