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EDA Design Flow Development Engineer

EDA Design Flow Development Engineer

CompanyIntel
LocationSanta Clara, CA, USA, Hillsboro, OR, USA, Phoenix, AZ, USA
Salary$161230 – $227620
TypeFull-Time
DegreesBachelor’s, Master’s, PhD
Experience LevelSenior, Expert or higher

Requirements

  • Candidate must have a BS, MS, or PhD degree in electrical engineering, computer engineering or similar field.
  • BS + 10 years or M.S./Ph.D. + 7 years of experience in the development of EDA tools, flows and/or design env for digital or analog designs with demonstrated strong programming skills.
  • Working knowledge in digital and/or analog Si design and methodology.

Responsibilities

  • Work in a team responsible for architecting, executing, and delivery of the EDA design flow for all DTCO activities, technology lead vehicle design, IP design, and product design in TD.
  • Build the design flow on top of a reference flow enabled on Intel technology and released from external EDA vendors.
  • Cover all aspects of front-end and back-end design from RTL to GDS, digital and analog, design creation, verification, and signoff.
  • Ensure disciplined flow execution to meet delivery milestones in a fast-paced environment on advanced technology nodes.

Preferred Qualifications

  • Working knowledge with major (EDA) software platforms (Synopsys, Cadence, Siemens).
  • Working knowledge of all aspects of digital SoC in a product setting – floorplanning, RTL design, logic synthesis, place and route, clock tree construction, extraction and timing signoff, signal integrity analysis, layout and reliability verification, and full chip integration.
  • Working knowledge of key aspects of Analog tools – schematic entry, custom layout editing, extraction, simulation, reliability, and signoff.
  • Demonstrated experience in establishing and qualifying digital or analog design flow from an EDA reference flow and addressing product specific design/methodology requirements and design database management.
  • Demonstrated ability to understand and interpret industry EDA trend in response to advanced node requirements, drive design flow initiatives to align.
  • Excellent written and verbal communication skills.