Digital Verification Engineer
| Company | Allegro MicroSystems |
|---|---|
| Location | Manchester, NH, USA |
| Salary | $Not Provided – $Not Provided |
| Type | Full-Time |
| Degrees | Master’s |
| Experience Level | Entry Level/New Grad |
Requirements
- Master’s degree in Electrical, Electronics, or Computer Engineering, or closely related engineering field
- 6 months of experience with verification development of architecture either in C/C++ or System Verilog on Linux or Unix platform
Responsibilities
- Write new test codes in either System Verilog or C/C++ and develop complex testbench for verification of magnetic sensors used in automotive and industrial applications.
- Generate test plans based on requirements from customer.
- Write tests to target specific functionality at the block level or top level of the design.
- Analyze test results and debug unexpected design behavior compared to the requirements.
- Script generation for automation within the design verification flow.
- Write and/or debug programs in C/C++ models used in design of sensors.
Preferred Qualifications
-
No preferred qualifications provided.