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Digital IC Design Engineer
| Company | Neuralink |
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| Location | Austin, TX, USA |
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| Salary | $101300 – $210400 |
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| Type | Full-Time |
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| Degrees | Bachelor’s |
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| Experience Level | Senior |
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Requirements
- Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience
- Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
- 5+ years of experience in digital design
- Expertise in SystemVerilog, C/C++, Python
- Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
- Experience in designing digital signal processing pipelines, from algorithm to RTL
Responsibilities
- Micro-architecture design and RTL implementation of low-power digital signal processors
- Micro-architecture design and RTL implementation of low-power general-purpose hardware accelerators
- Micro-architecture design and RTL implementation of low-power graphics processing units
- Micro-architecture design and RTL implementation of low-power radio MAC/PHY
- Micro-architecture design and RTL implementation of low-power serial link MAC/PHY
- Design and optimization of hardware/software interface with firmware engineers
- Application-specific architecture optimization including complex system modeling for energy and performance benchmarks, workload analysis and modeling, energy/performance profiling and analysis, leveraging architecture-level design trade-offs with process technology and workload type, balancing cost and performance under manufacturing process variation
- Collaboration on silicon bring-up tests with verification engineers
Preferred Qualifications
- Experience in architecture optimization with process technology customization
- Experience in the verification of complex digital systems, using industry standard tools
- Experience in the physical design of complex digital systems, using industry standard tools
- Experience testing and debugging digital system-on-a-chips
- Functional modeling experience and logic verification with SystemVerilog, SystemC/C++
- Experience automating tool flows
- Experience with embedded design
- Experience in processor instruction set architecture design
- Experience in compiler back-end design and customization
