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Circuit Design Engineer/Layout Engineer

Circuit Design Engineer/Layout Engineer

CompanyNorthrop Grumman
LocationHalethorpe, MD, USA, Annapolis Junction, MD, USA
Salary$85400 – $165500
TypeFull-Time
DegreesBachelor’s, Master’s
Experience LevelEntry Level/New Grad, Junior, Mid Level, Senior

Requirements

  • Bachelor’s Degree in a STEM related field with 2 years of related experience; or 0 years with Masters. An additional 4 year’s experience in lieu of degree will be considered.
  • Excellent verbal, written, and interpersonal communication skills.
  • Navigate file structures in the LINUX environment.
  • US Citizen with ability to obtain and maintain a TS/SCI with polygraph security clearance.
  • Bachelor’s Degree in a STEM related field with 5 years of related experience; 3 years with Masters; 1 year with a PhD. An additional 4 year’s experience in lieu of degree will be considered.
  • Excellent verbal, written, and interpersonal communication skills.
  • Navigate file structures in the LINUX environment.
  • US Citizen with ability to obtain and maintain a TS/SCI with polygraph security clearance.

Responsibilities

  • Create custom designs and layouts that could include Process Control Monitor (PCM) structures, reticle alignment marks, and physical measurement structures. Mentoring and guidance are provided by process engineers, photo lithography engineers and peer engineers.
  • Provide floor planning guidance and support.
  • Create chip designs in various technologies for process prove-in, experimentation, and test support.
  • Perform both frontend and backend verification of designs.
  • Participate in reticle composition and tape out activities.
  • Document work performed.

Preferred Qualifications

  • Understanding of the Semiconductor fabrication process and process development.
  • Understanding of Process Design Kit (PDK) Development (tech files, verification rule files, Pcells, skill programing)
  • Skilled in the use of the Cadence Virtuoso capture tool.
  • Proficient in the use of Cadence ASSURA or Siemens Mentor Calibre DRC/LVS verification tools.
  • Experience in Superconducting Reciprocal Quantum Logic circuit design practices
  • Current Secret or TS/SCI clearance