ASIC Design Engineer

ASIC Design Engineer

Requirements

• BSEE/MSEE
• Minimum 8 years of experience developing, implementing, and testing high performance communications/networking ASIC products
• Good RTL experience including specification, design, verification, and synthesis
• Strong UNIX-based EDA tool skills and knowledge of ASIC design flows
• Familiar with reusable HDL coding styles and design for high volume manufacture
• Efficient in Verilog/VHDL coding and Lint tools
• Synthesis using Synopsys tool suite
• Timing Analysis using Synopsys Primetime tool
• Formal Verification
• DFT concepts of Scan, BIST
• Strong Perl and Tcl scripting skill

Responsibilities

• Work closely with marketing, architecture, firmware, physical and layout teams on full product development cycle from definition to production
• Involve in engineering implementation spec writing from marketing/system requirements
• RTL design and verification
• Synthesis
• Static timing analysis
• Responsible for block and/or chip level design and integration

Preferred Qualifications

• 802.3 Ethernet or NIC experience
• Low power design skills
• Layer 1 through Layer 4 experience