CMP Engineer/Process Integration Technologist – R&D Engineering
| Company | Western Digital |
|---|---|
| Location | San Jose, CA, USA |
| Salary | $Not Provided – $Not Provided |
| Type | Full-Time |
| Degrees | Master’s, PhD |
| Experience Level | Mid Level, Senior |
Requirements
- Minimum of a Master’s degree in Chemistry, Chemical engineering, Physics, Materials Science, Electrical Engineering, or closely related field with 5+ years of professional experience or a Ph.D. with 2+ years is required.
Responsibilities
- Build nanoscale devices for a range of exploratory projects such as non-volatile memories, novel magnetic biosensor applications, AI memory/compute architectures, superconducting qubits, superconducting electronics, etc.
- Own the CMP sector in our research cleanroom, where he/she will be responsible for developing new polishing recipes for a wide array of devices, ranging from emerging memories, to qubits, to advanced biological sensors.
- Help integrate these CMP techniques into a variety of our process flows.
Preferred Qualifications
- Extensive background in CMP.
- Hands-on experience with a range of nanofabrication process equipment including AFM.
- Demonstrated ability to self-direct a research project.
- Strong communication skills and the ability to work both independently and in a team environment.
- Experience in device integration (CAD/mask layout/designing process flows/running process lots)