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Advanced Packaging and Heterogeneous Integration Engineer
Company | HRL Laboratories |
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Location | Delano, CA, USA |
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Salary | $163150 – $209088 |
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Type | Full-Time |
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Degrees | Master’s, PhD |
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Experience Level | Senior |
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Requirements
- More than 5 years of hands-on experience developing novel 2.5D and 3D microelectronic packaging and heterogeneous integration for RF & mm-W microsystems.
- Experience with design of experiments and analysis techniques (electrical, mechanical, thermal, chemical, etc.) needed to develop and assess new process integration modules and techniques.
- Heavy modeling and design experience. (Including thermal mechanical analysis or power integrity).
- More than 5 years of experience in organizing and/or leading technical research and development efforts, including US government proposal and marketing activities, and in preparing presentations and proposals needed to attract research funding.
- Experience developing external partnerships and vendor relationships.
- Experience with traditional as well as advanced packaging techniques (e.g. ceramic and laminate chip-level packages, printed circuit boards, SoC, SiP, MCM, HD interposers, etc.).
- Hands-on experience with semiconductor microfabrication is a plus.
- Candidates should possess a proven track record of developing novel and successful solutions to complex technical issues.
- Extensive knowledge of RF/mm-W (0.1-200+ GHz) with strong electromagnetic (EM) background is desired.
- Knowledge of multi-physics simulation tools (e.g. ANSYS, COMSOL), high frequency and RF simulation tools (e.g. ADS, MWO, Cadence), electromagnetic simulation tools (e.g. HFSS or CST).
- Deep understanding of electro-thermal-mechanical design trade-offs and design for manufacturing/reliability.
- Extensive knowledge of semiconductor microfabrication.
- Familiarity with digital, mixed-signal, power and signal integrity.
- Knowledge of systems engineering, program and project management is a plus.
- Understanding of material science, surface chemistry, semiconductor physics, and thermal/mechanical theory related to electronics processing and assembly techniques is a plus.
- Proficiency in use of computers, engineering workstations, complex electronic equipment, oral and written communication, interaction with vendors/colleagues and willingness to work in a fast-paced, deadline-driven environment.
- Ability to work well in a team and independently.
- Ph.D. or M.S. degree in Electrical Engineering, Mechanical Engineering, Physics, or related scientific discipline.
Responsibilities
- Perform research and development of novel 2.5D and 3D heterogeneous integration technologies for Radio-Frequency (RF) and Millimeter-Wave (mm-W) applications (e.g. next generation RF/mm-W Phased-Array Systems), with attention to all facets of this endeavor from conceptual design phase considering electrical, thermal, mechanical design constraint to engineering and manufacturing, as well as verification and validation phase.
- Address all levels of integration from chip-level to module & microsystem level (e.g. die and wafer stacking, WLFO).
- Perform theory-driven analyses of candidate approaches.
- Participate in research and development projects to be carried out by cross-functional technical teams (e.g. in each of the technical areas mentioned above).
- Provide mentorship and guidance to others in all aspects of these projects (technical, organization, reporting, etc.).
- Develop and maintain relationships with relevant vendors and partner organizations.
- Organize and present results, in written reports, journal papers, and oral presentations.
- Strong leadership and contributions to proposal and marketing efforts required to sustain continued R&D efforts.
Preferred Qualifications
- Hands-on experience with semiconductor microfabrication is a plus.
- Knowledge of systems engineering, program and project management is a plus.
- Understanding of material science, surface chemistry, semiconductor physics, and thermal/mechanical theory related to electronics processing and assembly techniques is a plus.