Principal Design Engineer – Analog Design
| Company | Cadence Design Systems |
|---|---|
| Location | Toronto, ON, Canada, Montréal, QC, Canada |
| Salary | $Not Provided – $Not Provided |
| Type | Full-Time |
| Degrees | |
| Experience Level | Senior, Expert or higher |
Requirements
- 5 years of experience in the development of CMOS SerDes or high-speed I/O IC
- Thorough understanding of jitter and signal equalization techniques
- Proficient design experience in SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC; Bias and Bandgap; Voltage Regulators
- Excellent problem-solving skills
- Good communication skills
- Ability to work cooperatively in a team environment
- Proficiency in using CAD tools for circuit simulation and post-layout verification
- Proficiency with layout entry
Responsibilities
- Design and develop analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications
- Contribute to the design of long-reach SerDes
Preferred Qualifications
- Working knowledge of a set of common SerDes standards and their electrical requirements
- Cadence tool experience
- Lab test experience
- Design experience at ≥16Gbps and in ≤16nm technologies
- Experience with layout entry