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FPGA Engineer
| Company | CACI |
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| Location | Rochester, NY, USA |
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| Salary | $82100 – $172400 |
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| Type | Full-Time |
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| Degrees | Bachelor’s |
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| Experience Level | Senior |
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Requirements
- BS in EE or similar field
- 5+ years of relevant experience
- Ability to obtain and maintain minimally a Secret clearance
- In-depth understanding of HDL coding in VHDL, Verilog and System Verilog
- Pin and Timing Constraints management
- Demonstrated ability to debug complex FPGA designs in system
- Programming FPGA devices using Python, C/C++, MATLAB/Simulink and VHDL
Responsibilities
No responsibilities provided.
Preferred Qualifications
- Ability to implement and debug complex high-speed architectures like JESD204C, 2.5G, 10G, 40G, 100G Ethernet.
- Ability to implement and debug VITA-49 transport layer in a system.
- Communications systems, associated algorithms and their design. This includes an understanding of RF filters, signal modulation/demodulation, channel equalization/channel estimation, channel coding (FEC), RF signal acquisition, RF frequency control (AFC), RF gain control (AGC)
- DSP baseband signal processing and task scheduling
- DSP Peripheral programming and control
- Demonstrated ability in bringing up custom hardware with FPGAs or SoCs
- Experience with SoC’s such as Ultrascale +, Zynq 7000, Agilex, etc.
- Simulation experience – Understanding of abstracted SystemVerilog classes and packages
