Server System Architect - SoC Architecture

Server System Architect – SoC Architecture

Bachelor’s degree in Computer Science/Engineering, Electrical Engineering, or a related field.
10+ years of experience in server SoC architecture, systems design, or related silicon development roles.
Strong expertise in SoC reset and boot flows for mission mode and test modes
Expertise in crash recovery and diagnostic mechanisms.
Expertise in clocking and reset architecture of multi-core, multi-chiplet, heterogeneous server SoC
Familiarity with secure boot, ROM code and early firmware bring-up
Deep understanding of hardware-firmware interaction, trust chains, fuse-based configurations, and system initialization.
Knowledge of debug and trace infrastructure: JTAG, ETM, PTM, STM, crash log capture, etc.
Experience writing architectural documentation and collaborating across cross-functional teams.

Architect boot and reset flows for a SoC including cold boot, warm reset, secure boot, measured boot, and recovery paths.
Define and drive the crash dump strategy, including failure containment, logging architecture, and capture mechanisms for post-mortem analysis.
Collaborate with security architects to support early trust establishment, root of trust, and attestation during boot.
Own and specify boot-time sequencing of power, clocks, fuses, and firmware handoff across subsystems.
Define reset domains and reset propagation strategies for isolated fault recovery.
Work closely with SoC integration, validation, software/firmware, and platform teams to ensure a seamless boot and debug experience.
Lead or contribute to the development of firmware architecture for early boot and crash capture.
Deliver detailed architecture specifications, timing diagrams, flowcharts, and interface definitions.

Master’s degree in Computer Science/Engineering, Electrical Engineering or a related field with 15 years of experience in semiconductor product development (Ex: System design, SoC security architecture, Security HW design and validation, Silicon test, SW development).
Experience with server SoCs and at-scale debug deployments
Understanding of server platform power sequencing, reset control, and bootloader chaining.
Good understanding of different types of run-time resets applicable to server SoCs
Experience in working with platform architects to drive the chipset connectivity as well as multi-chiplet IO architecture
Exposure to server platform hardware security architectures, including AC-RoT, PA-RoT, BMC, DC-SCM.
Contributions to industry standards (e.g., ACPI, UEFI, OCP, TCG, ARM SBSA).