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Senior VLSI CAD Engineer – ECO Tools

Senior VLSI CAD Engineer – ECO Tools

CompanyNVIDIA
LocationAustin, TX, USA, Santa Clara, CA, USA
Salary$136000 – $264500
TypeFull-Time
DegreesBachelor’s, Master’s
Experience LevelSenior

Requirements

  • BS or MS in Electrical Engineering (or equivalent experience)
  • 3+ years experience broadly across VLSI, including exposure to synthesis, clocks, DFT, power distribution, timing, and place & route. Previous experience as a physical design engineer would be ideal.
  • Proficiency in C++
  • Some familiarity with use of SAT solvers and packages for logic minimization
  • Insight and interest in boosting design team productivity through intuitive GUIs and APIs

Responsibilities

  • Innovate across the entire VLSI flow to make incremental recovery and optimization fast and seamless, primarily involving C++ and improving or replacing in-house algorithms for steps such as incremental CTS, incremental scan insertion, power hookup, placement, timing optimization, etc.
  • Educate RTL teams on best practices that you identify and advance.
  • Help develop GUIs for design visualization and other tools to boost designer productivity.
  • Over time, this role can expand to other areas of physical design implementation and analysis tools.
  • Own the whole process from discovery and invention of new optimization opportunities, to developing solutions and working directly inside design teams to facilitate deployment.

Preferred Qualifications

  • Experience with GUI frameworks, especially ImGui or Qt
  • Background with synthesis and timing tools, including Design Compiler, Fusion Compiler, and PrimeTime
  • Experience in using AI-coding assistants such as Cursor
  • Experience with scripting languages such as Python, Perl, or Tcl
  • Strong communication and interpersonal skills