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Senior Design Engineer – Coherent High Speed Interconnect
| Company | NVIDIA |
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| Location | Santa Clara, CA, USA |
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| Salary | $136000 – $264500 |
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| Type | Full-Time |
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| Degrees | Bachelor’s |
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| Experience Level | Senior |
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Requirements
- BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD) a plus.
- 5+ years or relevant design experience
- Knowledge of industry standard interconnect protocols like PCIE, CXL, AXI, CHI will be useful.
- Understanding or experience with Link layer stacks including Data link layer and Physical layer
- Experience with physical layer of interconnects such as Memory (DDR, LPDDR etc..), PCIE, SerDes
- Experience and knowledge in architecture, RTL design, performance analysis and power optimization.
- Strong working knowledge of Verilog or System Verilog.
- Good communication skills and interpersonal skills are required. A history of mentoring junior engineers and interns a huge plus.
Responsibilities
- You will be working on architecture and design of our state-of-the-art high speed coherent interconnects (NVLINK-C2C) for our mobile SoCs and GPUs.
- Collaborate with architects, external partners, software engineers, and circuit designers to deliver a class leading high speed coherent interconnect.
- The NVLINK-C2C enables the creation of a new class of integrated products with NVIDIA partners, built via chiplets, allowing NVIDIA GPUs, DPUs, and CPUs to be coherently interconnected with custom silicon.
- This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
Preferred Qualifications
No preferred qualifications provided.
