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IC Verification Engineer
Company | Broadcom Limited |
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Location | San Jose, CA, USA |
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Salary | $141000 – $225000 |
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Type | Full-Time |
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Degrees | Bachelor’s, Master’s |
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Experience Level | Senior, Expert or higher |
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Requirements
- Bachelors degree in Electrical/Electronics/Equivalent with 12+ years of experience or Masters degree in Electrical/Electronics/Equivalent with 10+ years of experience
- Decade+ experience in developing complex Verification Environments, developing Test plans, Functional coverage and pseudo-random testing
- Must have gone through a full ASIC cycle right from Architecture development to Tapeout with full focus on Verification
- Very proficient in System Verilog and Verification Methodologies like UVM/VMM
- Good debug skills in analyzing regression failures and understanding of complex designs
- A good understanding of a complex protocol like PCI Express or other multi-layered protocol
- Work with the team and mentor junior engineers
Responsibilities
- Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies
- Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features
- Build pseudo-random tests to verify and get to full Functional coverage and bring the Verification to closure
- Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps
- Work with other members of the team, guide/mentor junior team members
- Think differently and out-of-the-box to stress the DUT and verify it in an efficient way
- Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture
- Driver Verification quality and Efficiency improvements
Preferred Qualifications
- Experience in PCIe protocol
- Scripting knowledge of Python or Perl
- Comfort with Makefiles
- Experience with Verifying with other protocols like AXI