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Design Engineering Architect
| Company | Cadence Design Systems |
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| Location | San Jose, CA, USA |
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| Salary | $178500 – $331500 |
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| Type | Full-Time |
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| Degrees | Master’s, PhD |
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| Experience Level | Expert or higher |
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Requirements
- Thorough understanding of mixed-signal circuit design fundamentals
- Basic signal processing concepts
- High-Speed Analog/Mixed-Signal circuit design and verification flows
- Cadence analog design environment
- Excellent verbal and written communication skills
- PhD EE degree with 8+ or MS with 10+ years of relevant industry experience
Responsibilities
- Contribute to all aspects of mixed-signal design, verification, and testing
- Architectural exploration
- Circuit design and development
- Post-silicon test plan development and execution
- Collaboration with other functional teams to achieve functional and performance closure
Preferred Qualifications
- Familiarity with serial link design techniques
- Familiarity with serial link receiver analog frontend (high bandwidth termination, CTLE, VGA)
- Familiarity with data converter (ADCs and/or DACs) and/or clock synthesis and recovery (PLLs, DLLs, CDRs) techniques
- Familiarity with hardware description languages such as SystemVerilog or VerilogA for functional model development
- Familiarity with MATLAB, Python or C to facilitate architecture development
- Familiarity with scripting languages such as Perl or Python for automation
- Silicon validation testing knowledge and experience
