Principal Firmware Verification Engineer

Expertise in Universal Verification Methodology Framework (UVMF)
Experience in both System-Verilog and VHDL languages
Successfully completed verification of several designs for various devices and applications
Experience in verified communication interfaces and bus standards (e.g., AXI, SPI, I2C, PCIe, UART, or Gb Ethernet)
Experience in tested and verified designs using logic analyzers, high-speed oscilloscopes, signal generators, and/or target device debugging tools
Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 8 years prior relevant experience or an Advanced Degree in a related field and minimum 5 years of experience
The ability to obtain and maintain a U.S. government issued security clearance is required
U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance

Generate firmware verification requirements based on the system architecture
Generate firmware verification documentation that describes the firmware verification architecture, test plans, and coverage
Build UVMF/ System-Verilog based testbenches with agents, predictors, scoreboards, and testcases to verify HDL based designs
Create scripts to automate verification and test activities
Instruct, lead, and mentor other firmware engineers