Server Power Management Architect – CPU Engineering
| Company | Qualcomm |
|---|---|
| Location | Hillsboro, OR, USA |
| Salary | $Not Provided – $Not Provided |
| Type | Full-Time |
| Degrees | Bachelor’s, Master’s |
| Experience Level | Expert or higher |
Requirements
- Bachelor’s degree in Computer Science/Engineering, Electrical Engineering, or a related field.
- Over 10 years of experience in power management of CPU and/or SoCs, and at least 5 years of experience with a high-performance server chip
- Strong expertise in power management of a high-performance system including management of active power, idle low power and silicon/system limits
- Experience in power delivery systems including multi-phase bucks and LDOs
- Strong fundamentals in digital ASIC design and power of CMOS circuits
- Strong technical documentation skills, along with excellent written and verbal communication abilities.
Responsibilities
- Work with chip architects to understand architecture concept and high level system requirements
- Collaborate with HW, SW and FW architects to develop an optimal end-to-end power management architecture
- Execute System level power modeling for server use cases and analyze trade-offs
- Drive convergence of SoC and board power grid definition
- Architect SoC and system level power rail sequencing
- Collaborate with Thermal engineers to optimize implementation
- Must have good communication skills and able to work in dynamic environment with top level engineers and technologists
- Create detailed architecture specification documents
Preferred Qualifications
- Master’s in Computer Science/Engineering, Electrical Engineering, or related field.
- 15+ years in CPU and/or SoC architecture.
- Experience in TDP (thermal design power) capping and control
- Experience in measurement and management of over-current and voltage droop events
- Experience in developing solutions for power and performance telemetry
- Strong understanding of silicon test methodologies for power and thermal optimization
- Experience in designing SoCs for systems using off-the-shelf PMICs
- Proven track record in hyperscale data center solutions
- Familiarity with high performance and low power design techniques